IP Library Granted Patent US 7,079,422
Granted Patent B1
US 7,079,422 · App. 11/026,474 · Granted Jul 18, 2006

Periodic refresh operations for non-volatile multiple-bit-per-cell memory

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Quick Facts
Patent No.
US 7,079,422
App. No.
11/026,474
Granted
Jul 18, 2006
Kind
B1
Abstract

A multi-bit-per-cell non-volatile memory performs periodic refresh operations. The refresh operations can be timed according to a maximum tolerable drift for threshold voltages representing the data and an expected rate of drift of the threshold voltage. The refresh operation can move data to different physical storage locations and extend the life of a non-volatile memory by avoiding repetitive erasing and writing of the same data value in the same memory cell. A memory mapping circuit in the memory adjusts for different storage configuration that the refresh operations create. In a particular embodiment, a refresh operation swaps the physical locations of two data blocks, and alternates between two mappings of physical addresses to logical addresses.

Claims (9)

1. A method for operating a non-volatile memory, comprising;

storing data in the memory cells of the non-volatile memory, wherein each memory cell has a threshold voltage representing a multi-bit value; and

periodically refreshing the threshold voltages representing the data by reading the data and rewriting the data,

wherein periodically refreshing comprises:

determining a time since a last refreshment; and

performing a refresh operation if the time is greater than a period for the refreshing,

wherein the period for the refreshing is less than a ratio of a maximum tolerable drift for threshold voltages representing the data and an expected rate of drift of the threshold voltage.

2. The method of claim 1 , wherein reading and rewriting are performed internal to the non-volatile memory.

3. The method of claim 1 , wherein rewriting writes the data to different locations from where the data was read.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 3, 2006
From: INTERNATIONAL DEVELOPMENT AND LICENSING
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 017230/0319 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2005
From: MULTI LEVEL MEMORY TECHNOLOGY
To: INTERNATIONAL DEVELOPMENT AND LICENSING
Reel/Frame 017176/0517 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 28, 2005
From: MULTI LEVEL MEMORY TECHNOLOGY (CALIFORNIA)
To: MULTI LEVEL MEMORY TECHNOLOGY (NEVADA)
Reel/Frame 016800/0640 →