Patent Assignment
Reel/Frame 014331/0783
Assignment of Assignor's Interest
Recorded: 2004-02-12
Pages: 7
Assignors
BUI, DINH
Executed: 2004-01-27
SELF, PAUL W.
Executed: 2004-01-27
LO, PEDRO W.
Executed: 2004-01-27
MUKAIDA, SATOSHI
Executed: 2004-01-27
Assignee
ICS TECHNOLOGIES, INC.
103 FOULK ROAD, SUITE 212, WILMINGTON, DELAWARE, 19803
Covered Property
(1)
Signal Timing Adjustment Circuit with External Resistor
Related Assignments
(3)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest
Sep 20, 2006
From: ICS TECHNOLOGIES, INC.
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 018279/0284 →
Security Agreement
Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →
Release of Security Interest
Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION
Reel/Frame 048746/0001 →