Patent Assignment
Reel/Frame 014569/0805
Assignment of Assignor's Interest
Recorded: 2003-09-24
Pages: 5
Assignors
FANG, AL
Executed: 2003-09-16
FARRELL, MIKE
Executed: 2003-09-08
BUTKA, BRIAN
Executed: 2003-09-16
Assignee
INTEGRATED DEVICE TECHNOLOGY, INC.
2975 STENDER WAY, SANTA CLARA, CALIFORNIA, 95054
Covered Property
(1)
Delayed-Locked Loop with Fine and Coarse Control Using Cascaded Phase Interpolator and Variable Delay Circuit
Patent:
7,046,058 →
Application:
10/671,305 →
Related Assignments
(2)
Other recorded transfers of the patent in this record — the chain of ownership.
Security Agreement
Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →
Release of Security Interest
Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION
Reel/Frame 048746/0001 →