IP Library Assignment 014981/0119
Patent Assignment
Reel/Frame 014981/0119

Assignment of Assignor's Interest

Recorded: 2004-08-12 Received: 2004-08-12 Pages: 9
Assignors
NEC CORPORATION
Executed: 2004-04-26
NEC ELECTRONICS CORPORATION
Executed: 2004-04-26
Assignee
ELPIDA MEMORY, INC.
2-1, YAESU 2-CHOME, CHUO-KU, TOKYO, JPX, JAPAN
Covered Properties (34)
Semiconductor Device and Its Manufacturing Method
Application: 10/106,642 →
Semiconductor Memory Device and Its Operation Method
Application: 10/074,109 →
Sense Amplifier Arrangement for Semiconductor Memory Device
Application: 10/053,742 →
Semiconductor Memory Device with a Self Refresh Mode
Application: 10/051,343 →
Method for Authenticating a Portable Object, Corresponding Portable Object, and Apparatus Therefor
Application: 10/030,255 →
Method and Apparatus for Data Transmission and Reception
Application: 10/010,230 →
Structure and Manufacturing Method of Semiconductor Device Having Uneven Surface at Memory Cell Capacitor Part
Application: 10/010,421 →
Semiconductor Device and Its Manufacturing Method
Application: 09/997,593 →
Semiconductor Device Including an Insulated Gate Field Effect Transistor and Method of Manufacturing the Same
Application: 09/991,093 →
Semiconductor Memory Device and Method for Its Test
Application: 09/976,956 →
Semiconductor Integrated Circuit and Operating Method
Application: 09/939,869 →
Semiconductor Device
Application: 09/923,576 →
Semiconductor Memory Device and Method for Accessing Memory Cell
Application: 09/911,120 →
Dll Circuit and Dll Control Method
Application: 09/904,035 →
Semiconductor Memory Device and Control Method
Application: 09/899,779 →
Output Buffer Circuit
Application: 09/892,068 →
Semiconductor Memory and Memory Board Therewith
Application: 09/876,423 →
Block Arrangement for Semiconductor Memory Apparatus
Application: 09/867,212 →
Semiconductor Memory Device Having Fewer Memory Cell Plates Being Activated in a Test Mode Than in a Normal Mode
Application: 09/867,057 →
Synchronous Semiconductor Memory Device
Application: 09/864,243 →
Substrate Electric Potential Sense Circuit and Substrate Electric Potential Generator Circuit
Application: 09/863,789 →
Semiconductor Device
Application: 09/850,274 →
Semiconductor Memory Device
Application: 09/846,252 →
Memory Testing Apparatus and Method
Application: 09/844,357 →
Method of Dram
Application: 09/842,944 →
Semiconductor Memory Device Having a Test Mode Decision Circuit
Application: 09/839,504 →
Memory device with booting circuit capable of pre-booting before wordline selection
Application: 09/834,402 →
Differential Amplifier Circuit with Offset Circuit
Application: 09/833,974 →
Dll Circuit, Semiconductor Device Using the Same and Delay Control Method
Application: 09/828,002 →
Semiconductor Memory and Method of Saving Energy of the Memory
Application: 09/819,352 →
Circuit Module
Application: 09/802,404 →
Delay Circuit
Application: 09/800,025 →
Semiconductor Memory Device Having a Rebundant Block and Reduced Power Consumption
Application: 09/767,303 →
Structure and Manufacturing Method of Semiconductor Device Having Uneven Surface at Memory Cell Capacitor Part
Application: 09/761,364 →