Patent Assignment
Reel/Frame 015009/0863
Assignment of Assignor's Interest
Recorded: 2004-02-19
Pages: 2
Assignee
FUJITSU LIMITED
1-1, KAMIKODANAKA, 4-CHOME, NAKAHARA-KU, KAWASAKI-SHI, KANAGAWA, 211-8588, JAPAN
Covered Property
(1)
Bus Connection Circuit and Bus Connection System Having Plural Request Queues, a Bus Interface Portion Outputting Request Signals, an Arbiter Performing Arbitration of Plural Requests and a Bus Interface Portion Outputting a Request Signal Indicating Allocation of Pre-Fetch Buffers Corresponding to Arbitrated Requests