IP Library Assignment 015032/0399
Patent Assignment
Reel/Frame 015032/0399

Assignment of Assignor's Interest

Recorded: 2004-02-26 Pages: 3
Assignor
MORROW, MICHAEL W.
Executed: 2004-02-23
Assignee
INTEL CORPORATION
2200 MISSION COLLEGE BLVD., SANTA CLARA, CALIFORNIA, 95052
Covered Property (1)
Low Power Semi-Trace Instruction/Trace Hybrid Cache with Logic for Indexing the Trace Cache Under Certain Conditions
Patent: 7,437,512 →
Application: 10/788,725 →
Publication: US 2005/0193175
Related Assignments (3)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Nov 15, 2006
From: INTEL CORPORATION
To: MARVELL INTERNATIONAL LTD.
Reel/Frame 018515/0817 →
Assignment of Assignor's Interest Feb 20, 2020
From: MARVELL INTERNATIONAL LTD.
To: CAVIUM INTERNATIONAL
Reel/Frame 052918/0001 →
Assignment of Assignor's Interest Jun 16, 2020
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE, LTD.
Reel/Frame 053475/0001 →