IP Library Assignment 015062/0045
Patent Assignment
Reel/Frame 015062/0045

Assignment of Assignor's Interest

Recorded: 2004-08-13 Pages: 3
Assignors
NISHIDA, HARUO
Executed: 2004-03-03
ISHIDA, TAKUYA
Executed: 2004-03-03
Assignee
SEIKO EPSON CORPORATION
4-1, NISHI-SHINJUKU 2-CHOME, SHINJUKU-KU,, TOKYO,, JAPAN
Covered Property (1)
An Integrated Test Circuit, a Test Circuit, and a Test Method for Performing Transmission and Reception Processing to and from a First and a Second Macro Block at a First Frequency
Patent: 7,310,754 →
Application: 10/766,038 →
Publication: US 2004/0268193
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Sep 4, 2019
From: SEIKO EPSON CORPORATION
To: 138 EAST LCD ADVANCEMENTS LIMITED
Reel/Frame 050265/0622 →