IP Library › Assignment 015078/0566
Patent Assignment
Reel/Frame 015078/0566

Assignment of Assignor's Interest

Recorded: 2004-08-23 Pages: 3
Assignors
ZHANG, ZHENYUAN
Executed: 2004-04-01
ZHANG, WENJIN
Executed: 2004-04-01
Assignee
ZHANG, YAOMING
NO. 30 ANDELI, WEST YUHUA ROAD, NANJING CITY - JIANGSU PROVINCE, P.R., 210012, SWITZERLAND
Covered Property (1)
Integrated Circuit Memory Devices Having Clock Signal Arbitration Circuits Therein and Methods of Performing Clock Signal Arbitration
Patent: 7,093,047 →
Application: 10/613,246 →
Publication: US 2005/0005069
Related Assignments (4)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Jul 3, 2003
From: AU, MARIO; DUH, JIANN-JENG
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 014276/0042 →
Correct an Error Made in a Previously Recorded Document That Erroneously Affects the Patent Mar 28, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 042107/0975 →
Security Agreement Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →
Release of Security Interest Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION
Reel/Frame 048746/0001 →