IP Library Assignment 015174/0110
Patent Assignment
Reel/Frame 015174/0110

Assignment of Assignor's Interest

Recorded: 2004-03-31 Pages: 6
Assignors
GHONEIMA, MAGED M.
Executed: 2004-03-26
CAPUTA, PETER W.
Executed: 2004-03-30
KHELLAH, MUHAMMAD M.
Executed: 2004-03-25
KRISHNAMURTHY, RAM
Executed: 2004-03-26
TSCHANZ, JAMES W. 03252004
Executed: 2004-03-26
YE, YIBIN
Executed: 2004-03-25
DE, VIVEK K.
Executed: 2004-03-29
ISMAIL, YEHEA I.
Executed: 2004-03-29
Assignee
INTEL CORPORATION
2200 MISSION COLLEGE BLVD., SANTA CLARA, CALIFORNIA, 95052
Covered Property (1)
Single-Stage and Multi-Stage Low Power Interconnect Architectures
Patent: 6,992,603 →
Application: 10/813,084 →
Publication: US 2005/0225459
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Aug 15, 2022
From: INTEL CORPORATION
To: TAHOE RESEARCH, LTD.
Reel/Frame 061175/0176 →