Patent Assignment
Reel/Frame 015216/0598
Assignment of Assignor's Interest
Recorded: 2004-10-04
Pages: 3
Assignor
NAKAMURA, YUICHI
Executed: 2004-09-06
Assignee
NEC CORPORATION
7-1, SHIBA 5-CHOME MINATO-KU, TOKYO, JAPAN
Covered Property
(1)
Verification Method and System for Logic Circuit