IP Library › Assignment 015236/0996
Patent Assignment
Reel/Frame 015236/0996

Assignment of Assignor's Interest

Recorded: 2004-10-12 Pages: 4
Assignors
AU, MARIO
Executed: 2004-07-20
DUH, JIANN-JENG
Executed: 2004-07-20
Assignee
INTEGRATED DEVICE TECHNOLOGY, INC.
2975 STENDER WAY, SANTA CLARA, CALIFORNIA, 95054
Covered Property (1)
Sequential Flow-Control and Fifo Memory Devices Having Error Detection and Correction Capability with Diagnostic Bit Generation
Patent: 7,246,300 →
Application: 10/912,938 →
Related Assignments (2)
Other recorded transfers of the patent in this record — the chain of ownership.
Security Agreement Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →
Release of Security Interest Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION
Reel/Frame 048746/0001 →