Patent Assignment
Reel/Frame 015408/0178
Assignment of Assignor's Interest
Recorded: 2004-11-24
Pages: 5
Assignor
4198638 CANADA INC
Executed: 2004-10-14
Assignee
NORMAN, RICHARD S.
1877 CHEMIN POISSANT SUTTON, QUEBEC, JOE 2KO, CANADA
Covered Properties
(15)
Massively-Parallel Processor Array with Outputs from Individual Processors Directly to an External Device Without Involving Other Processors or a Common Physical Carrier
Patent:
5,801,715 →
Application:
08/323,580 →
Direct Replacement Cell Fault Tolerant Architecture
Patent:
5,748,872 →
Application:
08/618,397 →
Integrated Circuit Having Lithographical Cell Array Interconnections
Patent:
6,597,362 →
Application:
09/144,695 →
Efficient Direct Replacement Cell Fault Tolerant Architecture
Patent:
6,154,855 →
Application:
09/376,194 →
Efficient direct replacement cell fault tolerant architecture
Patent:
6,408,402 →
Application:
09/679,168 →
Output and/or Input Coordinated Processing Array
Methods, apparatus, and systems for reducing interference on nearby conductors
Application:
10/022,851 →
Publication:
US 2003/0117183
Methods, Apparatus, and Systems for Reducing Interference on Nearby Conductors
Methods, Apparatus, and Systems for Reducing Interference on Nearby Conductors
Methods, Apparatus, and Systems for Reducing Interference on Nearby Conductors
Fault Tolerant Scan Chain for a Parallel Processing System
Communications Bus for a Parallel Processing System
Method of Generating Large Scale Signal Paths in a Parallel Processing System
Fault Tolerant Cell Array Architecture
Method for continuous linear production of integrated circuits
Application:
10/458,734 →
Publication:
US 2004/0255096
Related Assignments
(2)
Other recorded transfers of the patents in this record — the chain of ownership.