Patent Assignment
Reel/Frame 015487/0599
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded: 2004-06-24
Received: 2004-06-25
Pages: 4
Assignor
AMD (U.S.) HOLDINGS, INC.
Executed: 2004-03-30
Assignee
AMD INVESTMENTS, INC.
ONE AMD PLACE, P.O. BOX 3453, SUNNYVALE, CA, 94088-3453, UNITED STATES
Covered Applications
(10)
RELACS SHRINK METHOD APPLIED FOR SINGLE PRINT RESIST MASK FOR LDD OR BURIED BITLINE IMPLANTS USING CHEMICALLY AMPLIFIED DUV TYPE PHOTORESIST
App. No. 10/126,326
→
DIE SEAL FOR SEMICONDUCTOR DEVICE MOISTURE PROTECTION
App. No. 09/998,624
→
INNOVATIVE METHOD OF HARD MASK REMOVAL
App. No. 10/045,354
→
DRAIN SIDE SENSING SCHEME FOR VIRTUAL GROUND FLASH EPROM ARRAY WITH ADJACENT BIT CHARGE AND HOLD
App. No. 09/999,869
→
DECODER APPARATUS AND METHODS FOR PRE-CHARGING BIT LINES
App. No. 09/928,059
→
VOLTAGE BOOST CIRCUIT USING SUPPLY VOLTAGE DETECTION TO COMPENSATE FOR SUPPLY VOLTAGE VARIATIONS IN READ MODE VOLTAGES
App. No. 09/915,018
→
Ceiling test mode to characterize the threshold voltage distribution of over programmed memory cells
App. No. 09/884,583
→
METHODS AND APPARATUS FOR READING A CAM CELL USING BOOSTED AND REGULATED GATE VOLTAGE
App. No. 09/873,927
→
SOFT PROGRAM AND SOFT PROGRAM VERIFY OF THE CORE CELLS IN FLASH MEMORY ARRAY
App. No. 09/829,193
→
I/O partitioning system and methodology to reduce band-to-band tunneling current during erase
App. No. 09/822,995
→