Patent Assignment
Reel/Frame 015497/0689
Assignment of Assignor's Interest
Recorded: 2004-06-18
Pages: 3
Assignors
TRAN, THINH
Executed: 2004-06-15
TZOU, JOSEPH
Executed: 2004-06-15
PARAMESWARAN, SURESH
Executed: 2004-06-15
Assignee
CYPRESS SEMICONDUCTOR CORP.
3901 N. FIRST STREET, SAN JOSE, CALIFORNIA, 95134
Covered Property
(1)
Memory Interface System and Method for Reducing Cycle Time of Sequential Read and Write Accesses Using Separate Address and Data Buses
Patent:
7,142,477 →
Application:
10/871,825 →
Related Assignments
(5)
Other recorded transfers of the patent in this record — the chain of ownership.
Security Interest
Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
Assignment and Assumption of Security Interest in Intellectual Property
Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
Corrective Assignment to Correct the 8647899 Previously Recorded on Reel 035240 Frame 0429. Assignor(S) Hereby Confirms the Security Interst.
Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
Release of Security Interest
Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
Assignment of Assignor's Interest
Apr 15, 2022
From: CYPRESS SEMICONDUCTOR CORPORATION
To: INFINEON TECHNOLOGIES LLC
Reel/Frame 059721/0467 →