IP Library Assignment 015670/0247
Patent Assignment
Reel/Frame 015670/0247

Assignment of Assignor's Interest

Recorded: 2004-08-12 Pages: 3
Assignors
FISHER, LOUIS CAMERON
Executed: 2004-07-15
BRUMITT, CHARLES JEREMY
Executed: 2004-07-12
Assignee
VIRAGE LOGIC CORPORATION
47100 BAYSIDE PARKWAY, FREMONT, CALIFORNIA, 94538
Covered Property (1)
Methods and Apparatuses for Memory Array Leakage Reduction Using Internal Voltage Biasing Circuitry
Patent: 7,149,142 →
Application: 10/856,191 →
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Oct 8, 2010
From: VIRAGE LOGIC CORPORATION; VL C.V.; ARC CORES LIMITED; ARC INTERNATIONAL I.P., INC.
To: SYNOPSYS, INC.
Reel/Frame 025105/0907 →