IP Library Assignment 015779/0974
Patent Assignment
Reel/Frame 015779/0974

Assignment of Assignor's Interest

Recorded: 2004-09-08 Pages: 3
Assignors
IKEDA, NORIYUKI
Executed: 2004-07-30
IWAMOTO, MASAMI
Executed: 2004-08-02
IWAMURA, HIROE
Executed: 2004-07-30
IKEUCHI, KENTARO
Executed: 2004-07-30
TSURUTA, YOUICHI
Executed: 2004-08-05
SONODA, JUNJI
Executed: 2004-08-02
WATANABE, ATSUSHI
Executed: 2004-08-05
Assignee
FUJITSU LIMITED
1-1, KAMIKODANAKA 4-CHOME, NAKAHARA-KU, KAWASAKI-SHI, KANAGAWA 211-8588, JAPAN
Covered Property (1)
Method and program for verifying logic circuit having asynchronous interface
Application: 10/935,109 →
Publication: US 2005/0216247
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Dec 5, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021976/0876 →