Patent Assignment
Reel/Frame 016250/0665
Assignment of Assignor's Interest
Recorded: 2005-02-10
Pages: 3
Assignors
YOSHIDA, TAKESHI
Executed: 2004-12-21
TAMURA, NAOYUKI
Executed: 2004-12-21
YAMAMOTO, YOU
Executed: 2004-12-21
Assignee
KABUSHIKI KAISHA TOSHIBA
1-1, SHIBAURA 1-CHOME, MINATO-KU, TOKYO, JAPAN
Covered Property
(1)
Semiconductor Integrated Circuit Including Standard Cell, Standard Cell Layout Design Method, and Layout Design Software Product Stored in Computer-Readable Recording Medium