Patent Assignment
Reel/Frame 016320/0920
Assignment of Assignor's Interest
Recorded: 2005-02-22
Pages: 7
Assignors
LEE, SHIH-KED
Executed: 2005-02-15
LIEN, CHUEN-DER
Executed: 2005-02-16
HUANG, LOUIS
Executed: 2005-02-16
JIN, GAOLONG
Executed: 2005-02-11
CAO, WANQING
Executed: 2005-02-11
LO, GUO-QIANG
Executed: 2005-02-22
Assignee
INTEGRATED DEVICE TECHNOLOGY, INC.
2975 STENDER WAY, SANTA CLARA, CALIFORNIA, 95054
Covered Property
(1)
Memory Cell with Reduced Soft Error Rate
Patent:
7,214,990 →
Application:
11/063,704 →
Related Assignments
(2)
Other recorded transfers of the patent in this record — the chain of ownership.
Security Agreement
Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →
Release of Security Interest
Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION
Reel/Frame 048746/0001 →