Assignment of Assignor's Interest

Recorded: 2005-08-31 Pages: 3

Assignor

VASUDEVAN, ANIL

Executed: 2005-08-04

Assignee

INTEL CORPORATION

2200 MISSION COLLEGE BLVD., SANTA CLARA, CALIFORNIA, 95052

Covered Property (1)

Method and Apparatus to Reduce Latency and Improve Throughput of Input/Output Data in a Processor

Patent: 7,480,747 →

Application: 11/147,991 →

Publication: US 2006/0282560

Related Assignments (2)

Other recorded transfers of the patent in this record — the chain of ownership.