IP Library Assignment 017236/0500
Patent Assignment
Reel/Frame 017236/0500

Assignment of Assignor's Interest

Recorded: 2005-11-12 Pages: 5
Assignors
LIM, YEOW KHENG
Executed: 2005-08-15
SEET, CHIM SENG
Executed: 2005-08-15
LU, WEI
Executed: 2005-08-15
ZHANG, HAO
Executed: 2005-08-15
HSIA, LIANG CHOO
Executed: 2005-08-16
GUPTA, JYOTI
Executed: 2005-10-31
Assignee
CHARTERED SEMICONDUCTOR MANUFACTURING LTD.
60 WOODLANDS INDUSTRIAL PARK D, STREET TWO, SINGAPORE, 738406, SINGAPORE
Covered Property (1)
Formation of Metal Silicide Layer Over Copper Interconnect for Reliability Enhancement
Patent: 7,790,617 →
Application: 11/273,108 →
Publication: US 2007/0111522