Patent Assignment
Reel/Frame 017365/0048
Assignment of Assignor's Interest
Recorded: 2006-03-22
Pages: 4
Assignee
STMICROELECTRONICS PVT. LTD.
PLOT NO. 2 AND 3 & 18, SECTOR 16A, INSTITUTIONAL AREA, NOIDA-201-301, UTTAR PRADESH, INDIA
Covered Property
(1)
Efficient Method for Mapping a Logic Design on Field Programmable Gate Arrays
Related Assignments
(2)
Other recorded transfers of the patent in this record — the chain of ownership.