IP Library › Assignment 017402/0139
Patent Assignment
Reel/Frame 017402/0139

Assignment of Assignor's Interest

Recorded: 2006-03-31 Pages: 2
Assignor
WONG, TAK KWONG (DINO)
Executed: 2006-03-31
Assignee
INTEGRATED DEVICE TECHNOLOGY, INC.
6024 SILVER CREEK VALLEY ROAD, SAN JOSE, CALIFORNIA, 95138
Covered Property (1)
Data Output Clock Selection Circuit for Quad-Data Rate Interface
Patent: 7,400,178 →
Application: 11/278,368 →
Publication: US 2007/0234251
Related Assignments (2)
Other recorded transfers of the patent in this record — the chain of ownership.
Security Agreement Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →
Release of Security Interest Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION
Reel/Frame 048746/0001 →