IP Library Assignment 017481/0587
Patent Assignment
Reel/Frame 017481/0587

Assignment of Assignor's Interest

Recorded: 2006-01-13 Pages: 3
Assignors
MURASE, MASAKI
Executed: 2005-12-22
NAKAJIMA, YOSHIHARU
Executed: 2005-12-26
KIDA, YOSHITOSHI
Executed: 2005-12-27
Assignee
SONY CORPORATION
7-35 KITASHINAGAWA 6-CHOME, SHINAGAWA-KU, TOKYO, JAPAN
Covered Property (1)
Delay time correction circuit, video data processing circuit, and flat display device
Application: 10/564,473 →
Publication: US 2006/0164364
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest May 7, 2013
From: SONY CORPORATION
To: JAPAN DISPLAY WEST INC.
Reel/Frame 030363/0517 →