IP Library Assignment 018785/0564
Patent Assignment
Reel/Frame 018785/0564

Assignment of Assignor's Interest

Recorded: 2007-01-22 Pages: 5
Assignors
SCHWARZENBACH, WALTER
Executed: 2006-11-20
BEN MOHAMED, NADIA
Executed: 2006-12-01
MALEVILLE, CHRISTOPHE
Executed: 2007-01-10
MAUNAND TUSSOT, CORINNE
Executed: 2007-01-17
Assignee
S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES S.A.
PARC TECHNOLOGIQUE DES FONTAINES, CHEMIN DES FRANQUES, 38190 BERNIN, FRANCE
Covered Property (1)
Methods for Minimizing Defects When Transferring a Semiconductor Useful Layer
Patent: 7,749,862 →
Application: 11/624,867 →
Publication: US 2007/0117229
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Change of Name Mar 4, 2012
From: S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES
To: SOITEC
Reel/Frame 027800/0911 →