Patent Assignment
Reel/Frame 018797/0190
Release of Security Interest
Recorded: 2007-01-16
Pages: 2
Assignor
SILICON VALLEY BANK
Executed: 2006-12-19
Assignee
THARAS SYSTEMS, INC.
2518 MISSION COLLEGE RD., SUITE 101, SANTA CLARA, CALIFORNIA, 95054
Covered Properties
(5)
Functional Verification of Integrated Circuit Designs
Patent:
6,138,266 →
Application:
09/097,874 →
Functional Verification System
Tracing Different States Reached by a Signal in a Functional Verification System
Run-Time Controller in a Functional Verification System
Functional Verification of Both Cycle-Based and Non-Cycle Based Designs
Related Assignments
(6)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Aug 9, 2001
From: GANESAN, SUBBU; BROUKHIS, LEONID ALEXANDER; NARAYANASWAMY, RAMESH; NIXON, IAN MICHAEL
To: THARAS SYSTEMS, INC.
Reel/Frame 012068/0421 →
Security Agreement
Aug 18, 2003
From: THARAS SYSTEMS, INC.
To: SILICON VALLEY BANK
Reel/Frame 014384/0668 →
Assignment of Assignor's Interest
Feb 18, 2008
From: THARAS SYSTEMS INC.
To: EVE-USA, INC.
Reel/Frame 020518/0576 →
Assignment of Assignor's Interest
May 13, 2008
From: EVE-USA, INC.
To: EVE-SA
Reel/Frame 020930/0678 →
Re-Record to Correct the Address of the Assignee, Previously Recorded on Reel 020930 Frame 0678.
Jul 3, 2008
From: EVE-USA, INC
To: EVE-SA
Reel/Frame 021194/0423 →
Change of Name
Aug 2, 2013
From: EMULATION AND VERIFICATION ENGINEERING
To: SYNOPSYS EMULATION AND VERIFICATION
Reel/Frame 030954/0787 →