Patent Assignment
Reel/Frame 018852/0983
Assignment of Assignor's Interest
Recorded: 2007-02-05
Pages: 6
Assignors
CHUA, THAI CHENG
Executed: 2006-07-28
MUTHUKRISNAN, SHANKAR
Executed: 2000-10-04
SWENBERG, JOHANES
Executed: 2006-07-28
KHER, SHREYAS
Executed: 2006-07-28
WANG, CHIKUANG CHARLES
Executed: 2006-07-27
CONTI, GIUSEPPINA
Executed: 2006-07-27
URITSKY, YURI
Executed: 2006-07-27
Assignee
APPLIED MATERIALS, INC.
P.O. BOX 450-A, LEGAL AFFAIRS DEPARTMENT, SANTA CLARA, CALIFORNIA, 95052
Covered Property
(1)
Method for Fabricating an Integrated Gate Dielectric Layer for Field Effect Transistors