Method for fabricating an integrated gate dielectric layer for field effect transistors

1. A method for forming dielectric layers on a substrate, comprising:

forming a silicon oxide layer on a substrate;

plasma treating nitrogen atoms into the silicon oxide layer using RF power applied at a duty cycle selected to provide a nitrogen concentration in the silicon oxide layer of between about 0.2E 15 atoms/cm 2 to about 1E 15 atoms/cm 2 , wherein plasma treating the silicon oxide layer further comprises creating nucleation sites on the silicon oxide layer;

depositing a silicon nitride layer on the silicon oxide layer by an ALD process; and

thermal annealing the substrate.

2. The method of claim 1 , wherein the step of plasma treating the silicon oxide layer further comprises:

flowing an inert gas into a plasma treatment chamber; and

forming a plasma by the inert gas, wherein the inert gas is a nitrogen containing gas.

3. The method of claim 2 , wherein the step of flowing the inert gas further comprises:

flowing the inert gas between about 50 sccm and about 750 sccm into the plasma treatment chamber.

4. The method of claim 2 , wherein the step of forming a plasma further comprises:

applying a RF power between about 500 Watts and about 3000 Watts.

5. The method of claim 2 , wherein the inert gas is mixed with a gas selected from a group consisting of Ar, He, Ne, Xe, and the combination thereof.

6. The method of claim 1 , further comprising:

precleaning the substrate prior to forming the silicon oxide layer.

7. The method of claim 1 , wherein the step of forming the silicon oxide layer, further comprises:

forming the silicon oxide layer with a thickness less than 15 Å.

8. The method of claim 1 , wherein depositing the silicon nitride layer further comprises:

depositing the silicon nitride with a thickness less than 15 Å.

9. The method of claim 1 , wherein the step of depositing the silicon nitride layer further comprises:

cyclically flowing a silicon containing gas and a nitrogen containing gas into an ALD chamber.

10. The method of claim 9 , wherein the step of flowing further comprises:

flowing the silicon containing gas into the ALD chamber between about 5 sccm and about 500 sccm; and then

flowing the nitrogen containing gas into the ALD chamber between about 1000 sccm and about 5000 sccm.

11. The method of claim 9 , wherein the nitrogen containing gas is at least one of NH 3 , N 2 , N 2 H 4 or N 2 O.

12. The method of claim 9 , wherein the silicon containing gas is at least one of SiH 4 , Si 2 H 6 , dichlorosilane (DCS), tetrachlorosilane (TCS) or hexachlorodisilane (HCD).

13. The method of claim 1 , wherein the silicon oxide layer and the silicon nitride layer form a gate dielectric layer.

14. A method for forming a gate dielectric layer on a substrate, comprising:

precleaning a substrate;

forming a silicon oxide layer on the substrate;

supplying a RF power between about 800 Watts and about 1400 Watts to form a plasma from a nitrogen containing gas, wherein the RF power is applied at a duty cycle selected to provide a nitrogen concentration in the silicon oxide layer of between about 0.2E 15 atoms/cm 2 to about 1E 15 atoms/cm 2 , wherein the duty cycle includes at least one of pulsing the RF power or supplying power at a duty cycle of about 2 percent and about 50 percent;

plasma treating the silicon oxide layer in the presence of the plasma formed from the nitrogen containing gas to obtain a nitrogen concentration in the silicon oxide layer between about 0.2E 15 atoms/cm 2 to about 1E 15 atoms/cm 2 , wherein plasma treating the silicon oxide layer further comprises creating nucleation sites on the silicon oxide layer;

depositing a silicon nitride layer on the silicon oxide layer by an ALD process; and

thermal annealing the substrate, wherein the silicon oxide layer and the silicon nitride layer form a gate dielectric layer.

15. The method of claim 14 , wherein the silicon oxide layer and the silicon nitride layer have a total thickness less than 30 Å.

16. A method for forming a gate structure, comprising:

precleaning a substrate;

forming a silicon oxide layer on the substrate;

plasma treating nitrogen atoms into the silicon oxide layer using RF power applied at a duty cycle selected to provide a nitrogen concentration in the silicon oxide layer of between about 0.2E 15 atoms/cm 2 to about 1E 15 atoms/cm 2 , wherein plasma treating the silicon oxide layer further comprises creating nucleation sites on the silicon oxide layer;

depositing a silicon nitride layer on the silicon oxide layer by an ALD process;

thermal annealing the substrate, wherein the silicon oxide layer and the silicon nitride layer has a total thickness less than 30 Å and forms a gate dielectric;

forming a gate electrode on the gate dielectric; and

forming source and drain regions in the substrate proximate the gate electrode.

17. The method of claim 16 , wherein plasma treating further comprises:

applying a RF power to generate plasma, wherein the RF power is applied at a duty cycle of about 5 percent at a set point of about 800 Watts.

18. The method of claim 17 , wherein the plasma treating further comprises:

applying RF power having an effective power of about 40 Watts.