Patent Assignment
Reel/Frame 018876/0920
Assignment of Assignor's Interest
Recorded: 2007-01-30
Pages: 10
Assignors
MCCRACKEN, THADDEUS CLAY
Executed: 2007-01-25
LEE, JONG-CHANG
Executed: 2007-01-25
WU, PING-CHIH
Executed: 2007-01-25
NGHIEM, CECILE
Executed: 2007-01-25
CHEONG, KIT L.
Executed: 2007-01-25
EICHENSEER, PATRICK J.
Executed: 2007-01-26
Assignee
CADENCE DESIGN SYSTEMS, INC.
2655 SEELY AVENUE-BLDG. 5, SAN JOSE, CALIFORNIA, 95134
Covered Property
(1)
Method and System for Conducting Design Explorations of an Integrated Circuit