IP Library › Assignment 019825/0493
Patent Assignment
Reel/Frame 019825/0493

Change of Name

Recorded: 2007-09-15 Pages: 4
Assignor
S3 INCORPORATED
Executed: 2000-11-09
Assignee
SONICBLUE INCORPORATED
2841 MISSION COLLEGE BOULEVARD, SANTA CLARA, CALIFORNIA, 95054
Covered Properties (48)
Image Memory Controller for Controlling Multiple Memories and Method of Operation
Patent: 5,241,642 →
Application: 07/414,139 →
Method and Apparatus for Producing Perception of High Quality Grayscale Shading on Digitally Commanded Displays
Patent: 5,293,159 →
Application: 07/865,046 →
Integrated Video Scaling and Sharpening Filter
Patent: 5,422,827 →
Application: 08/017,696 →
Process for Producing Shaded Colored Images Using Dithering Techniques
Patent: 5,757,347 →
Application: 08/061,802 →
Shared Memory for Split-Panel Lcd Display Systems
Patent: 5,537,128 →
Application: 08/101,770 →
Vga Controller Circuitry
Patent: 5,581,279 →
Application: 08/147,456 →
Variable Pixel Depth and Format for Video Windows
Patent: 5,608,864 →
Application: 08/235,764 →
Method and Apparatus for Expanding and Centering Vga Text and Graphics
Patent: 5,521,614 →
Application: 08/235,827 →
Video Window Generator with Scalable Video
Patent: 5,402,513 →
Application: 08/266,164 →
A Video Processor Mutiple Streams of Video Data in Real-Time
Patent: 5,440,683 →
Application: 08/328,382 →
Video Processing Apparatus, Systems and Methods
Patent: 5,821,918 →
Application: 08/402,862 →
Video Processing Apparatus Systems and Methods
Patent: 5,625,379 →
Application: 08/402,935 →
Brightness Control for Liquid Crystal Displays
Patent: 5,734,362 →
Application: 08/474,416 →
Optimum Implementation of X-Y Clipping on Pixel Boundary
Patent: 5,668,941 →
Application: 08/493,665 →
Method and Apparatus for Upscaling Video Images When Pixel Data Used for Upscaling a Source Video Image Are Unavailable
Patent: 5,703,618 →
Application: 08/561,907 →
Controller for Processing Different Pixel Data Types Stored in the Same Display Memory by Use of Tag Bits
Patent: 5,828,383 →
Application: 08/576,870 →
Hardware Assist for Yuv Data Format Conversion to Software Mpeg Decoder
Patent: 6,005,546 →
Application: 08/619,203 →
Register Set Reordering for a Graphics Processor Based Upon the Type of Primitive to Be Rendered
Patent: 5,793,386 →
Application: 08/672,620 →
Object Referenced Memory Mapping
Patent: 5,758,128 →
Application: 08/673,774 →
System and Method for the Mixing of Graphics and Video Signals
Patent: 5,889,499 →
Application: 08/683,102 →
Apparatus, Systems and Methods for Controlling Data Overlay in Multimedia Data Processing and Display Systems Using Mask Techniques
Patent: 5,977,960 →
Application: 08/707,937 →
Instruction Format for Ensuring Safe Execution of Display List
Patent: 5,875,295 →
Application: 08/724,618 →
Debug and Video Queue for Multi-Processor Chip
Patent: 5,848,264 →
Application: 08/740,248 →
Multiplier with Selectable Booth Encoders for Performing 3D Graphics Interpolations with Two Multiplies in a Single Pass Through the Multiplier
Patent: 5,935,198 →
Application: 08/755,545 →
Dithering Method and Apparatus Using Ramp Probability Logic
Patent: 6,088,016 →
Application: 08/777,557 →
Method for Triangle Subdivision in Computer Graphics Texture Mapping to Elimiate Artifacts in High Perspective Polygons
Patent: 5,841,443 →
Application: 08/803,460 →
Method and Apparatus for Adjusting Graphics Processing Procedures Based on a Selectable Speed/Quality Gauge
Patent: 5,977,983 →
Application: 08/803,461 →
Method and Apparatus for Shortening Display List Instructions
Patent: 6,072,508 →
Application: 08/818,053 →
Method and Apparatus for Programming a Graphics Subsystem Register Set
Patent: 6,028,613 →
Application: 08/821,125 →
Variable Band Size Compositing Buffer Method and Apparatus
Patent: 5,835,104 →
Application: 08/841,360 →
Software-Based Dithering Method and Apparatus Using Ramp Probability Logic
Patent: 6,008,796 →
Application: 08/856,546 →
Block-And Band-Oriented Traversal in Three-Dimensional Triangle Rendering
Patent: 5,945,997 →
Application: 08/883,536 →
System and Method for Self-Adjusting Data Strobe
Patent: 5,948,083 →
Application: 08/941,402 →
Computer Processor with Two Addressable Memories and Two Stream Registers and Method of Data Streaming of Alu Operation
Patent: 5,958,038 →
Application: 08/966,904 →
Opposing Directional Fill Calculators in a Graphics Processor
Patent: 6,141,020 →
Application: 08/968,309 →
System and Methods for Both 2-Tap and 3 Tap Flicker Filtering of Non- Interlaced Computer Graphics to Interlaced Lines for Television Display
Patent: 6,084,568 →
Application: 08/969,637 →
Real Time Dram Eliminating a Performance Penalty for Crossing a Page Boundary
Patent: 6,009,019 →
Application: 09/019,345 →
Flat-Panel Display Controller with Improved Dithering and Frame Rate Control
Patent: 6,008,794 →
Application: 09/021,718 →
High Dc Current Stagger Power/Ground Pad
Patent: 6,031,258 →
Application: 09/036,351 →
Agp/Ddr Interfaces for Full Swing and Reduced Swing (Sstl) Signals on an Integrated Circuit Chip
Patent: 6,005,412 →
Application: 09/057,047 →
Non-Stalled Requesting Texture Cache
Patent: 6,011,565 →
Application: 09/057,628 →
System and Method for Performing Blending Using an Over Sampling Buffer
Patent: 6,144,365 →
Application: 09/060,923 →
Adaptive Dynamic Aperture Correction
Patent: 6,172,718 →
Application: 09/061,725 →
Method and Apparatus for Upscaling Video Images in a Graphics Controller Chip
Patent: 6,115,507 →
Application: 09/076,670 →
System and Method for Performing Dithering with a Graphics Unit Having an Oversampling Buffer
Patent: 6,154,195 →
Application: 09/079,973 →
Programmable Delay Timing Calibrator for High Speed Data Interface
Patent: 6,041,419 →
Application: 09/085,984 →
Double Buffered Graphics and Video Accelerator Having a Write Memory Interface and Method of Doing the Same
Patent: 6,128,026 →
Application: 09/122,422 →
Timing and Control for Deinterlacing and Enhancement of Non-Deterministically Arriving Interlaced Video Data
Patent: 6,034,733 →
Application: 09/127,117 →
Related Assignments (4)
Other recorded transfers of the patents in this record — the chain of ownership.
Security Agreement Aug 29, 1996
From: CIRRUS LOGIC, INC.
To: BANK OF AMERICA NATIONAL TRUST & SAVINGS ASSOCIATION AS AGENT
Reel/Frame 008113/0001 →
Assignment of Assignor's Interest Sep 17, 1996
From: LARSON, MICHAEL K.; HARKIN, PATRICK A.
To: CIRRUS LOBIC, INC.
Reel/Frame 008139/0411 →
Assignment of Assignor's Interest Sep 17, 1996
From: LARSON, MICHAEL K.
To: CIRRUS LOGIC, INC.
Reel/Frame 008154/0572 →
Deed of Discharge Nov 26, 2012
From: BANK OF AMERICA NATIONAL TRUST & SAVINGS ASSOCIATION
To: CIRRUS LOGIC, INC.
Reel/Frame 029353/0747 →