IP Library › Assignment 020636/0602
Patent Assignment
Reel/Frame 020636/0602

Assignment of Assignor's Interest

Recorded: 2008-03-12 Pages: 6
Assignors
LAM, CHRISTOPHER TIN SING
Executed: 2008-02-22
WANG, FU CHENG
Executed: 2008-02-25
CHEN, SHOU FANG
Executed: 2008-02-25
Assignee
MSTAR SEMICONDUCTOR, INC.
4F-1, NO. 26, TAI YUAN ST., CHU PEI, HSINCHU HSIEN, 302, TAIWAN
Covered Property (1)
Clock Generator, Method for Generating Clock Signal and Fractional Phase Lock Loop Thereof
Patent: 7,944,265 →
Application: 12/046,527 →
Publication: US 2008/0238498
Related Assignments (2)
Other recorded transfers of the patent in this record — the chain of ownership.
Merger Jun 12, 2020
From: MSTAR SEMICONDUCTOR, INC.
To: MEDIATEK INC.
Reel/Frame 052931/0468 →
Assignment of Assignor's Interest Mar 3, 2021
From: MEDIATEK INC.
To: XUESHAN TECHNOLOGIES INC.
Reel/Frame 055486/0870 →