Patent Assignment
Reel/Frame 020730/0132
Assignment of Assignor's Interest
Recorded: 2008-03-31
Pages: 6
Assignors
SUBASHCHANDRABOSE, RAMESH
Executed: 2006-11-16
MOHANTY, ANUPAM
Executed: 2006-11-16
AGARWAL, RAJAT
Executed: 2006-11-16
Assignee
INTEL CORPORATION
2200 MISSION COLLEGE BOULEVARD, SANTA CLARA, CALIFORNIA, 95052
Covered Property
(1)
Mechanism to Generate Logically Dedicated Read and Write Channels in a Memory Controller