IP Library Assignment 021138/0817
Patent Assignment
Reel/Frame 021138/0817

Merger

Recorded: 2008-06-20 Pages: 18
Assignor
Assignee
SYNOPSYS, INC. A DELAWARE CORPORATION
700 E. MIDDLEFIELD ROAD, MOUNTAIN VIEW, CALIFORNIA, 94043
Covered Properties (15)
Method and System for Debugging an Electronic System
Patent: 7,072,818 →
Application: 09/724,585 →
Method and System for Debugging an Electronic System Using Instrumentation Circuitry and a Logic Analyzer
Patent: 7,065,481 →
Application: 10/212,128 →
Publication: US 2003/0069724
Verification of Digital Circuitry Using Range Generators
Patent: 7,117,463 →
Application: 10/289,045 →
Publication: US 2004/0088622
Method and Apparatus to Estimate Delay for Logic Circuit Optimization
Patent: 6,973,632 →
Application: 10/310,423 →
Methods and Apparatuses for Designing Integrated Circuits
Patent: 7,010,769 →
Application: 10/313,523 →
Publication: US 2003/0079195
Method and Apparatus for the Design and Analysis of Digital Circuits with Time Division Multiplexing
Patent: 7,007,254 →
Application: 10/346,934 →
Method and Apparatus for Automated Synthesis of Multi-Channel Circuits
Patent: 7,093,204 →
Application: 10/407,678 →
Publication: US 2004/0199878
Reducing Clock Skew in Clock Gating Circuits
Patent: 7,082,582 →
Application: 10/640,932 →
Method and Apparatus for Circuit Design and Synthesis
Patent: 7,131,078 →
Application: 10/646,657 →
Methods and Apparatuses for Designing Integrated Circuits
Patent: 6,978,430 →
Application: 10/731,312 →
Publication: US 2004/0117756
Method and Apparatus for Resetable Memory and Design Approach for Same
Patent: 6,934,183 →
Application: 10/804,878 →
Method and Apparatus for Parallel Carry Chains
Patent: 7,051,296 →
Application: 10/817,586 →
Method and System for User-Defined Triggering Logic in a Hardware Description Language
Patent: 7,107,570 →
Application: 10/822,192 →
Reducing Equivalence Checking Complexity Using Inverse Function
Patent: 7,146,589 →
Application: 10/924,433 →
Hardware Debugging in a Hardware Description Language
Patent: 7,069,526 →
Application: 11/027,052 →
Publication: US 2005/0125754
Related Assignments (11)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Aug 21, 2003
From: MAHESHWARI, NARESH; MCELVAIN, KENNETH S.
To: SYNPLICITY, INC.
Reel/Frame 014430/0542 →
Assignment of Assignor's Interest Apr 8, 2004
From: LAROUCHE, MARIO; NG, CHUN KIT
To: SYNPLICITY, INC.
Reel/Frame 015214/0858 →
Assignment of Assignor's Interest May 4, 2006
From: RAMPON, JEROME DANIEL JEAN; MCELVAIN, KENNETH S.
To: SYNPLICITY, INC.
Reel/Frame 017576/0007 →
Change of Name Aug 21, 2012
From: SYNPLICITY, INC.
To: SYNPLICITY, LLC
Reel/Frame 028824/0301 →
Assignment of Assignor's Interest Aug 21, 2012
From: SCHUBERT, NILS ENDRIC; BEARDSLEE, JOHN MARK; PERRY, DOUGLAS L.
To: BRIDGES2SILICON, INC.
Reel/Frame 028822/0965 →
Assignment of Assignor's Interest Aug 21, 2012
From: BRIDGES2SILICON, INC.
To: SYNPLICITY, INC.
Reel/Frame 028823/0016 →
Assignment of Assignor's Interest Aug 21, 2012
From: SYNPLICITY, LLC
To: SYNOPSYS, INC.
Reel/Frame 028823/0086 →
Assignment of Assignor's Interest Oct 3, 2012
From: SESHADRI, VIJAY K.; MCELVAIN, KENNETH S.
To: SYNPLICITY
Reel/Frame 029101/0423 →
Assignment of Assignor's Interest Oct 9, 2012
From: SESHADRI, VIJAY K.; MCELVAIN, KENNETH S.
To: SYNPLICITY
Reel/Frame 029123/0475 →
Change of Name Oct 11, 2012
From: SYNPLICITY, INC.
To: SYNPLICITY, LLC
Reel/Frame 029125/0206 →
Assignment of Assignor's Interest Oct 25, 2012
From: SYNPLICITY, LLC
To: SYNOPSYS, INC.
Reel/Frame 029210/0067 →