IP Library Assignment 021171/0606
Patent Assignment
Reel/Frame 021171/0606

Assignment of Assignor's Interest

Recorded: 2008-06-30 Pages: 2
Assignor
JUNG, JIN-KI
Executed: 2008-05-29
Assignee
HYNIX SEMICONDUCTOR INC.
SAN 136-1, AMI-RI, BUBAL-EUB, ICHON-SI, KYOUNGKI-DO, 467-860, KOREA, REPUBLIC OF
Covered Property (1)
Mask Layout and Method for Forming Vertical Channel Transistor in Semiconductor Device Using the Same
Patent: 7,994,061 →
Application: 12/164,675 →
Publication: US 2009/0163011