IP Library Assignment 021403/0805
Patent Assignment
Reel/Frame 021403/0805

Assignment of Assignor's Interest

Recorded: 2008-08-18 Pages: 4
Assignors
TIEN, LI-CHUN
Executed: 2008-08-13
LU, LEE-CHUNG
Executed: 2008-08-13
HOU, YUNG-CHIN
Executed: 2008-08-13
TAI, CHUN-HUI
Executed: 2008-08-13
GUO, TA-PEN
Executed: 2008-08-13
CHEN, SHENG-HSIN
Executed: 2008-08-13
LI, PING CHUNG
Executed: 2008-08-13
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
NO. 8, LI-HSIN RD. 6, SCIENCE-BASED INDUSTRIAL PARK, HSIN-CHU, 300-77 R.O.C., TAIWAN
Covered Property (1)
Layout Architecture for Improving Circuit Performance
Patent: 7,821,039 →
Application: 12/193,354 →
Publication: US 2009/0315079