IP Library Assignment 021665/0859
Patent Assignment
Reel/Frame 021665/0859

Assignment of Assignor's Interest

Recorded: 2008-10-10 Pages: 6
Assignors
ALEKSANYAN, KAREN
Executed: 2008-09-24
AMIRKHANYAN, KAREN
Executed: 2008-09-24
KARAPETYAN, SERGEY
Executed: 2008-09-24
SHUBAT, ALEXANDER
Executed: 2008-09-24
SHOUKOURIAN, SAMVEL
Executed: 2008-09-24
VARDANIAN, VALERY
Executed: 2008-09-24
ZORIAN, YERVANT
Executed: 2008-09-28
Assignee
VIRAGE LOGIC CORPORATION
47100 BAYSIDE PARKWAY, FREMONT, CALIFORNIA, 94538
Covered Property (1)
Various Methods and Apparatuses for Memory Modeling Using a Structural Primitive Verification for Memory Compilers
Patent: 8,112,730 →
Application: 12/249,085 →
Publication: US 2009/0106716
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Oct 8, 2010
From: VIRAGE LOGIC CORPORATION; VL C.V.; ARC CORES LIMITED; ARC INTERNATIONAL I.P., INC.
To: SYNOPSYS, INC.
Reel/Frame 025105/0907 →