Patent Assignment
Reel/Frame 022177/0523
Corrective Assignment to Correct the Omission of the Application Filing Date and Serial Number Previously Recorded on Reel 008929 Frame 0744. Assignor(S) Hereby Confirms the Assignment, Attached, with Conveyance Text in the Third and Fifth Paragraphs.
Recorded: 2009-02-02
Pages: 4
Assignors
LEE, PETER W.
Executed: 1997-12-22
HSU, FU-CHANG
Executed: 1997-12-02
TSAO, HSING-YA
Executed: 1997-12-02
Assignee
APLUS INTEGRATED CIRCUITS, INC.
13990 PIKE ROAD, SARATOGA, CALIFORNIA, 95070
Covered Property
(1)
Flash Memory with Novel Bitline Decoder and Sourceline Latch
Patent:
5,920,503 →
Application:
08/850,489 →
Related Assignments
(4)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest
Apr 21, 2009
From: APLUS FLASH TECHNOLOGY, INC.
To: ABEDNEJA ASSETS AG L.L.C.
Reel/Frame 022562/0920 →
Assignment of Assignor's Interest
Dec 23, 2013
From: ABEDNEJA ASSETS AG L.L.C.
To: INTELLECTUAL VENTURES FUND 100 LLC
Reel/Frame 031841/0255 →
Security Agreement
Feb 7, 2014
From: SECURE AXCESS LLC
To: INTELLECTUAL VENTURES HOLDING 47 LLC; INTELLECTUAL VENTURES FUND 100 LLC
Reel/Frame 032168/0279 →
Assignment of Assignor's Interest
Mar 4, 2014
From: INTELLECTUAL VENTURES FUND 100 LLC
To: SECURE AXCESS LLC
Reel/Frame 032342/0065 →