Patent Assignment
Reel/Frame 022254/0993
Assignment of Assignor's Interest
Recorded: 2009-01-30
Pages: 3
Assignor
TAGO, SATOSHI
Executed: 2009-01-26
Assignee
NEC ELECTRONICS CORPORATION
1753 SHIMONUMABE, NAKAHARA-KU, KAWASAKI, KANAGAWA, 211-8668, JAPAN
Covered Property
(1)
Method of Designing Semiconductor Integrated Circuit Having Function to Adjust Delay Pass and Apparatus for Supporting Design Thereof
Related Assignments
(2)
Other recorded transfers of the patent in this record — the chain of ownership.