Patent Assignment
Reel/Frame 022798/0551
Assignment of Assignor's Interest
Recorded: 2009-05-29
Pages: 2
Assignee
FUJITSU MICROELECTRONICS LIMITED
7-1, NISHI-SHINJUKU 2-CHOME, SHINJUKU-KU, TOKYO 163-0722, JAPAN
Covered Property
(1)
Method of Verifying Layout Data for Semiconductor Device
Application:
12/457,056 →
Publication:
US 2009/0327982
Related Assignments
(1)
Other recorded transfers of the patent in this record — the chain of ownership.