Patent Assignment
Reel/Frame 024794/0500
CHANGE OF NAME
Recorded: 2010-07-27
Received: 2010-07-30
Pages: 27
Assignor
FUJITSU MICROELECTRONICS LIMITED
Executed: 2010-04-01
Assignee
FUJITSU SEMICONDUCTOR LIMITED
2-10-23 SHIN-YOKOHAMA, KOHOKU-KU, YOKOHAMA-SHI, KANAGAWA 222-0033, JPX, JAPAN
Covered Applications
(100)
SIGNAL PROCESSOR AND COMMUNICATION DEVICE
App. No. 12/769,143
→
INPUT CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT
App. No. 12/724,942
→
VIDEO DECODER AND DIGITAL BROADCAST TRANSRECEIVER
App. No. 12/723,853
→
EXECUTION HISTORY TRACING METHOD
App. No. 12/721,667
→
LOOKUP TABLE, SEMICONDUCTOR INTEGRATED CIRCUIT, METHOD FOR MAKING LOOKUP TABLE AND METHOD FOR MAKING SEMICONDUCTOR INTEGRATED CIRCUIT
App. No. 12/713,270
→
LAYOUT VERIFICATION METHOD
App. No. 12/700,117
→
SUPPORTING PROGRAM, DESIGN SUPPORTING DEVICE AND DESIGN SUPPORTING METHOD
App. No. 12/640,677
→
PERFORMANCE EVALUATION DEVICE, PERFORMANCE EVALUATION METHOD AND SIMULATION PROGRAM
App. No. 12/636,295
→
DATA TRANSFER APPARATUS AND DATA TRANSFER METHOD
App. No. 12/635,148
→
AMBLE MODULATION SERIES
App. No. 12/634,197
→
INFORMATION PROCESSOR
App. No. 12/628,486
→
INTERFACE APPARATUS AND RESYNCHRONIZATION METHOD
App. No. 12/625,041
→
INTERFERENCE MEASURING AND MAPPING METHOD AND APPARATUS FOR WIRELESS NETWORKS USING RELAY STATIONS
App. No. 12/619,251
→
SIMULATION PROGRAM AND SIMULATION APPARATUS
App. No. 12/618,137
→
SYSTEM LSI HAVING PLURAL BUSES
App. No. 12/617,291
→
GRAPHICS DISPLAY DEVICE AND GRAPHICS DISPLAY METHOD
App. No. 12/615,584
→
LAYOUT DESIGN METHOD AND SEMICONDUCTOR INTEGRATED CIRCUIT
App. No. 12/614,833
→
Design support method
App. No. 12/588,919
→
MEMORY ACCESS CONTROL CIRCUIT AND IMAGE PROCESSING SYSTEM
App. No. 12/608,322
→
SWAP CIRCUIT FOR COMMON KEY BLOCK CIPHER AND ENCRYPTION/DECRYPTION CIRCUIT INCLUDING THE SAME
App. No. 12/580,462
→
RAID CONTROLLER, STORAGE CONTROL DEVICE, AND STORAGE CONTROL METHOD
App. No. 12/576,420
→
MULTIPROCESSOR SYSTEM CONFIGURED AS SYSTEM LSI
App. No. 12/574,769
→
DATA TRANSFER METHOD
App. No. 12/585,894
→
Method of designing semiconductor device including density verification
App. No. 12/556,302
→
LOAD DISTRIBUTING METHOD, COMPUTER PRODUCT, AND LOAD DISTRIBUTING APPARATUS
App. No. 12/553,201
→
COMPUTING APPARATUS
App. No. 12/552,651
→
LOGIC SIMULATION METHOD AND LOGIC SIMULATOR
App. No. 12/585,081
→
PROCESSOR SYSTEM OPTIMIZATION SUPPORTING APPARATUS AND SUPPORTING METHOD
App. No. 12/549,708
→
SOFTWARE OPTIMIZATION DEVICE AND SOFTWARE OPTIMIZATION METHOD
App. No. 12/548,751
→
SEMICONDUCTOR DEVICE, GRAPHICS CONTROLLER, AND INFORMATION PROCESSING METHOD
App. No. 12/545,250
→
RECORDING MEDIUM, DRIVE DEVICE, AND MOUNTING METHOD
App. No. 12/545,177
→
Semiconductor integrated circuit design method and semiconductor integrated circuit design apparatus
App. No. 12/461,585
→
PROFILING METHOD, SYSTEM, AND RECORDING MEDIUM HAVING A PROFILING PROGRAM
App. No. 12/542,325
→
ARBITRATION DEVICE, ARBITRATION METHOD, AND ELECTRONIC APPARATUS
App. No. 12/540,844
→
INTER-DEVICE CONNECTION TEST CIRCUIT GENERATING METHOD, GENERATION APPARATUS, AND ITS STORAGE MEDIUM
App. No. 12/538,460
→
METHOD OF VERIFYING LAYOUT DATA FOR SEMICONDUCTOR DEVICE
App. No. 12/457,056
→
METHOD AND DEVICE FOR TRANSMITTING PACKETS
App. No. 12/385,002
→
CACHE MEMORY SYSTEM, DATA PROCESSING APPARATUS, AND STORAGE APPARATUS
App. No. 12/402,114
→
Intellectual property model creating apparatus, intellectual property model creating method, and computer product
App. No. 12/379,774
→
Processor, performance profiling apparatus, performance profiling method , and computer product
App. No. 12/379,549
→
LOGIC CIRCUIT HAVING GATED CLOCK BUFFER
App. No. 12/320,684
→
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE OR PHOTOMASK
App. No. 12/364,077
→
EXPOSURE DATA GENERATOR AND METHOD THEREOF
App. No. 12/320,124
→
DATA GENERATION METHOD FOR SEMICONDUCTOR DEVICE, AND ELECTRON BEAM EXPOSURE SYSTEM
App. No. 12/350,525
→
INSTRUCTION CHECK PROGRAM, INSTRUCTION CHECK APPARATUS, AND I/O SIMULATOR
App. No. 12/343,767
→
METHOD AND APPARATUS FOR AUTOMATIC GAIN CONTROL IN A MOBILE ORTHOGONAL FREQUENCY DIVISION MULTIPLE ACCESS (OFDMA) NETWORK
App. No. 12/338,411
→
DYNAMIC RECONFIGURABLE CIRCUIT WITH A PLURALITY OF PROCESSING ELEMENTS, DATA NETWORK, CONFIGURATION MEMORY, AND IMMEDIATE VALUE NETWORK
App. No. 12/335,773
→
SEMICONDUCTOR DEVICE AND METHOD OF ESTIMATING CAPACITANCE VALUE
App. No. 12/335,097
→
EXPOSURE DATA PREPARATION METHOD AND EXPOSURE METHOD
App. No. 12/332,456
→
DYNAMIC RECONFIGURATION SUPPORTING METHOD, DYNAMIC RECONFIGURATION SUPPORTING APPARATUS, AND DYNAMIC RECONFIGURATION SYSTEM
App. No. 12/332,792
→
SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND COMPUTER READABLE MEDIUM
App. No. 12/326,154
→
Method for generating performance evaluation model
App. No. 12/289,759
→
AUTHENTICATION DEVICE AND AUTHENTICATION CONTROL METHOD OF A SEMICONDUCTOR CHIP
App. No. 12/257,033
→
METHOD AND APPARATUS FOR ESTIMATING CORE SIZE IN DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT
App. No. 12/252,043
→
METHOD AND PROGRAM FOR FILE INFORMATION WRITE PROCESSING
App. No. 12/212,439
→
LOOP PROCESSING COUNTER WITH AUTOMATIC START TIME SET OR TRIGGER MODES IN CONTEXT RECONFIGURABLE PE ARRAY
App. No. 12/232,462
→
PROFILING METHOD AND PROGRAM
App. No. 12/210,552
→
SEMICONDUCTOR INTEGRATED CIRCUIT AND DEBUG MODE DETERMINATION METHOD
App. No. 12/232,178
→
SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND METHOD FOR DESIGNING MANUFACTURING SEMICONDUCTOR DEVICE
App. No. 12/207,922
→
Encoding device and encoding method and decoding device and decoding method
App. No. 12/230,534
→
METHOD OF VERIFYING CIRCUIT AND COMPUTER-READABLE STORAGE MEDIUM FOR STORING COMPUTER PROGRAM
App. No. 12/230,387
→
RADIO APPARATUS AND ANTENNA THEREOF
App. No. 12/198,271
→
METHOD AND APPARATUS FOR CONTROLLING A RELAY STATION IN A MULTI-HOP RELAY NETWORK
App. No. 12/191,762
→
SEMICONDUCTOR DEVICE, CONTROL METHOD OF SEMICONDUCTOR DEVICE, AND CONTROL INFORMATION GENERATING METHOD FOR SEMICONDUCTOR DEVICE
App. No. 12/188,449
→
PROGRAM CONVERSION APPARATUS, PROGRAM CONVERSION METHOD, AND COMUTER PRODUCT
App. No. 12/219,864
→
Simulation of program execution to detect problem such as deadlock
App. No. 12/213,871
→
A/D CONVERTER PREVENTING RESULTS OF A/D CONVERSION FROM BEING OVERWRITTEN
App. No. 12/155,314
→
Simulation device for co-verifying hardware and software
App. No. 12/155,002
→
SYMBOL TIMING RECOVERY CIRCUIT
App. No. 12/112,757
→
CACHE COLORING METHOD AND APPARATUS BASED ON FUNCTION STRENGTH INFORMATION
App. No. 12/078,650
→
METHOD AND APPARATUS FOR LOGIC EQUIVALENCE VERIFICATION, AND COMPUTER PRODUCT
App. No. 12/081,127
→
METHOD FOR LAYING OUT DECOUPLING CELLS AND APPARATUS FOR LAYING OUT DECOUPLING CELLS
App. No. 12/078,341
→
DATA TRANSFER CONTROL APPARATUS AND DATA TRANSFER CONTROL METHOD
App. No. 12/057,533
→
MICROPROCESSOR SAVING DATA STORED IN REGISTER AND REGISTER SAVING METHOD
App. No. 12/076,857
→
LOGIC VERIFICATION METHOD
App. No. 12/076,552
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FAILURE DIAGNOSTIC APPARATUS, FAILURE DIAGNOSTIC SYSTEM, AND FAILURE DIAGNOSTIC METHOD
App. No. 12/051,412
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IMAGE RECOGNITION DEVICE AND IMAGE ROTATING METHOD
App. No. 12/050,513
→
IEEE 1394 TRANSMITTER, IEEE 1394 RECEIVER AND AUDIO DATA CONTENT TRANSMISSION METHOD
App. No. 12/046,684
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Method and apparatus for measuring distance with graphic data
App. No. 12/073,897
→
DATA PROCESSOR AND MEMORY READ ACTIVE CONTROL METHOD
App. No. 12/040,269
→
SIMULATION METHOD AND SIMULATION APPARATUS
App. No. 12/037,297
→
SEMICONDUCTOR DEVICE AND DMA TRANSFER METHOD
App. No. 12/037,109
→
ASYNCHRONOUS CIRCUIT LOGICAL VERIFICATION METHOD, LOGICAL VERIFICATION APPARATUS, AND COMPUTER READABLE STORAGE MEDIUM
App. No. 12/036,516
→
COMPUTER SYSTEM AND MEMORY SYSTEM
App. No. 12/036,634
→
Computer-readable recording medium recording file processing program, and file processing method and apparatus, and computer-readable recording medium recording functional program
App. No. 12/071,715
→
PROCESSING APPARATUS FOR STORING BRANCH HISTORY INFORMATION IN PREDECODE INSTRUCTION CACHE
App. No. 12/071,586
→
PROFILING APPARATUS AND PROFILING PROGRAM
App. No. 12/033,975
→
PROCESSING ELEMENT AND RECONFIGURABLE CIRCUIT INCLUDING THE SAME
App. No. 12/033,969
→
SIMULATOR ENGINE DEVELOPMENT SYSTEM AND SIMULATOR ENGINE DEVELOPMENT METHOD
App. No. 12/068,122
→
METHOD OF SEARCHING FOR WIRING ROUTE INCLUDING VIAS IN INTEGRATED CIRCUIT
App. No. 12/068,034
→
TIMING VERIFICATION METHOD AND APPARATUS
App. No. 12/010,202
→
Method of designing semiconductor integrated circuit, design device, and CAD program
App. No. 12/005,616
→
Secure processor system without need for manufacturer and user to know encryption information of each other
App. No. 12/004,423
→
OFDM RECEIVER APPARATUS
App. No. 11/958,579
→
TRANSMISSION MODE/GUARD LENGTH DETECTION CIRCUIT AND METHOD THEREFOR
App. No. 11/948,111
→
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PRODUCT
App. No. 11/946,467
→
METHOD AND APPARATUS FOR CHECKING CURRENT DENSITY LIMITATION
App. No. 11/979,834
→
BANDWIDTH REUSE IN A MULTI-HOP MOBILE RELAY SYSTEM
App. No. 11/930,360
→
FRAME STRUCTURE FOR A RELAY STATION OPERATING IN MOBILE NETWORKS
App. No. 11/927,035
→
INFORMATION PROCESSING APPARATUS PLAYING ENCRYPTED CONTENT DISTRIBUTED THROUGH NETWORK
App. No. 11/976,764
→