IP Library Granted Patent US 7,984,343
Granted Patent B2
US 7,984,343 · App. 12/538,460 · Granted Jul 19, 2011

Inter-device connection test circuit generating method, generation apparatus, and its storage medium

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,984,343
App. No.
12/538,460
Granted
Jul 19, 2011
Kind
B2
Abstract

A test circuit can use a simple test pattern data without customization for each substrate and considerably reduce a test preparation process. A connection test circuit is generated by receiving the input of the data of the connection relation indicating the devices mutually line-connected among a plurality of devices, the number of connection lines corresponding to the respective connection relations, and the device outputting a test result, sequentially searching for a connection destination device from the output terminal of an output device, and embedding a test circuit module in a test route.

Claims (36)

1. An inter-device connection test circuit generating method, comprising:

receiving input of data of a connection relation indicating devices mutually line-connected among a plurality of devices, a number of connection lines corresponding to respective connection relations, and a result output device outputting a test result; and

generating a connection test circuit for a line between the devices corresponding to a line connection among the plurality of devices wherein

connection destination devices are sequentially searched for corresponding to the connection line between the connection destination devices from an output terminal of the result output device, and a test route for a connection test is generated.

2. The method according to claim 1 , wherein

the plurality of devices are programmable devices capable of changing a function by a program.

3. The method according to claim 1 , wherein

a test circuit module corresponding to the test route is embedded in the plurality of devices to generate the connection test circuit.

4. The method according to claim 3 , wherein

the test circuit module corresponds to the plurality of devices, and is realized in a programmable device whose function can be changed by a program.

5. The method according to claim 4 , wherein

used as the test circuit module are an output circuit included in the result output device, a transmission circuit for outputting a test pattern data, a reception circuit for receiving a signal from the transmission circuit, and a transfer circuit for outputting from one signal line signals input from two circuits.

6. The method according to claim 5 , wherein

the output circuit and the transfer circuit output test pattern data for testing an output line of the circuits before outputting input data.

7. The method according to claim 1 , wherein

an expected value to be output from the result output device is generated corresponding to the transmitted test route and predetermined test pattern data.

8. The method according to claim 7 , wherein

a test result output value output from the result output device is compared with the generated expected value corresponding to the predetermined test pattern data, and a defective line point is detected in a mutual line connection among the plurality of device.

9. The method according to claim 7 , wherein

the predetermined test pattern data is “0” and “1” corresponding to each connection line among the devices, and the test pattern data is transmitted between devices in 2 cycles for one connection line.

10. An inter-device connection test circuit generation apparatus, comprising:

a test route search unit that receives input of data of a connection relation indicating devices mutually line-connected among a plurality of devices, a number of connection lines corresponding to respective connection relations, and a result output device outputting a test result, and searches for a test route for the connection line test;

a test circuit/expected value generation unit that embeds a formatted test circuit module on the retrieved test route, generates a connection test circuit, and generates an expected value as output pattern data expected when the connection line is in a normal condition for test pattern data used in the connection test circuit; and

a result comparison unit that compares comparing the generated expected value with a result of a test conducted on the generated connection test circuit, and designates a defective point in a line.

11. The apparatus according to claim 10 , wherein

the plurality of devices are programmable devices capable of changing a function by a program.

12. The apparatus according to claim 11 , wherein

the test circuit module is realized in a programmable device capable of changing a function by a program.

13. The apparatus according to claim 12 , wherein

used as the test circuit module are an output circuit included in the result output device, a transmission circuit for outputting a test pattern data, a reception circuit for receiving a signal from the transmission circuit, and a transfer circuit for outputting from one signal line a signal input from two circuits.

14. A computer-readable portable storage medium, on which is stored a program for enabling a computer to execute an inter-device connection test circuit generating process, the program comprising:

a procedure of receiving input of data of a connection relation indicating devices mutually line-connected among a plurality of devices, a number of connection lines corresponding to respective connection relations, and a result output device outputting a test result;

a procedure of searching for a test route for the connection line test, embedding a formatted test circuit module in the retrieved test route, generating a connection test circuit, and outputting obtained data to memory;

a procedure of generating an expected value as output pattern data expected when the connection line is in a normal state corresponding to a test pattern data used in the connection test circuit, and storing obtained data in the memory;

a procedure of reading the expected value and a result of a test conducted on the generated connection test circuit from the memory; and

a procedure of comparing the test result with the expected value and designating a defective point in a line.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035508/0637 →
CHANGE OF NAME Recorded Jul 27, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024794/0500 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 10, 2009
From: TAMAI, KOHICHI
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 023073/0058 →