IP Library Patent Application 12457056
Patent Application
App. No. 12/457,056

Method of verifying layout data for semiconductor device

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Quick Facts
Patent No.
US None
App. No.
12/457,056
Abstract

A data verification method executed by a data verification device that verifies hierarchical structure layout data for a semiconductor device. The method includes retrieving a verification condition that is set in accordance with a data processing system which processes the layout data generated by and provided from a designing device, extracting shaped item existing range information and possessive layout information from the layout data to generate a hierarchical expansion table, cumulating the possessive layout information associated with each cell from an uppermost layer cell of a layout path to a target cell, calculating a cumulative value of the possessive layout information for the layout path, determining whether or not the possessive layout information satisfies the verification condition based on the cumulative value, the verification condition, and the possessive layout information, and determining whether or not the shaped item existing range information satisfies the verification condition.

Claims (44)

1 . A data verification method executed by a data verification device that verifies hierarchical structure layout data for a semiconductor device, the data verification method comprising:

retrieving a verification condition that is set in accordance with a data processing system which processes the layout data generated by and provided from a designing device;

extracting shaped item existing range information and possessive layout information from the layout data to generate a hierarchical expansion table and store the table in a storage unit, in which the shaped item existing range information represents a range in which a shaped item exists in cells that are included in the layout data, the possessive layout information is for referring from a cell to a cell that is at least one order lower in hierarchy, and the hierarchical expansion table associates at least either one of the shaped item existing range information and the possessive layout information with each cell;

determining a target cell and a layout path to the target cell and storing information of the determined layout path in the storage unit;

reading out the possessive layout information associated with the cell of each hierarchy forming the determined layout path from the hierarchical expansion table, cumulating the possessive layout information associated with each cell from an uppermost layer cell of the layout path to the target cell, and calculating a cumulative value of the possessive layout information for the layout path;

determining whether or not the possessive layout information satisfies the verification condition based on the cumulative value, the verification condition, and the possessive layout information; and

determining whether or not the shaped item existing range information satisfies the verification condition based on the cumulative value of the possessive layout information for the layout path, the shaped item existing range information associated with the target cell, and the verification condition.

2 . The data verification method according to claim 1 , wherein in the determining whether or not the possessive layout information satisfies the verification condition, the data verification device calculates for each hierarchy a difference between the cumulative value, which is obtained from the uppermost layer cell to the cell of the hierarchy, and the verification condition as a tolerable value, compares the possessive layout information of the cell in the hierarchy with the tolerable value, and determines whether or not the possessive layout information satisfies the verification condition.

3 . The data verification method according to claim 1 , wherein in the determining whether or not the shaped item existing range information satisfies the verification condition, the data verification device calculates a difference between the cumulative value of the possessive layout information for the layout path and the verification condition as a tolerable value, compares the shaped item existing range information for the cell of each hierarchy with the tolerable value, and determines whether or not the shaped item existing range information of the target cell satisfies the verification condition.

4 . The data verification method according to claim 1 , wherein the data verification device:

determines an operation mode in accordance with a signal based on operation of an input unit or information stored in the storage unit;

when the operation mode is a first mode, executes a detailed verification process including the retrieving a verification condition set through the determining whether or not the shaped item existing range information; and

when the operation mode is a second mode, executes a simple verification process, the simple verification process including:

retrieving the verification condition that is set in accordance with a data processing system which processes the layout data;

extracting from the layout data the shaped item existing range information, which represents a range in which a shaped item exists in cells, and the possessive layout information, which is for referring from a cell to a cell that is at least one order lower in hierarchy, and storing the hierarchical expansion table, which associates at least either one of the shaped item existing range information and the possessive layout information with each cell, in the storage unit;

reading out from the hierarchical expansion table the possessive layout information associated with a target cell, which is a child cell; and

comparing the read out possessive layout information with the verification condition to determine whether or not the read out possessive layout information satisfies the verification condition.

5 . The data verification method according to claim 1 , further comprising:

outputting a result of the determining whether or not the shaped item existing range information satisfies the verification condition.

6 . The data verification method according to claim 1 , wherein the determining whether or not the shaped item existing range information satisfies the verification condition is executed before the layout data is provided to the data processing system, and the method further comprising:

providing the layout data having that satisfies the verification condition to the data processing system.

7 . A data verification device that verifies hierarchical structure layout data for a semiconductor device, the data verification device comprising:

an input unit which retrieves a verification condition that is set in accordance with a data processing system which processes the layout data generated by and provided from a designing device;

a verification condition generation unit which stores the verification condition in a storage unit;

a data input unit which retrieves the layout data;

a table generation unit which extracts shaped item existing range information and possessive layout information from the layout data to generate a hierarchical expansion table and store the table in a storage unit, in which the shaped item existing range information represents a range in which a shaped item exists in cells that are included in the layout data, the possessive layout information is for referring from a cell to a cell that is at least one order lower in hierarchy, and the hierarchical expansion table associates at least either one of the shaped item existing range information and the possessive layout information with each cell; and

a verification unit which:

determines a target cell and a layout path to the target cell and stores information of the determined layout path in the storage unit;

reads out the possessive layout information associated with the cell of each hierarchy forming the determined layout path from the hierarchical expansion table, cumulates the possessive layout information associated with each cell from an uppermost layer cell of the layout path to the target cell, and calculates a cumulative value of the possessive layout information for the layout path;

determines whether or not the possessive layout information satisfies the verification condition based on the cumulative value, the verification condition, and the possessive layout information; and

determines whether or not the shaped item existing range information satisfies the verification condition based on the cumulative value of the possessive layout information for the layout path, the shaped item existing range information associated with the target cell, and the verification condition.

8 . The data verification device according to claim 7 , wherein the verification unit calculates a difference between the cumulative value, which is obtained for each hierarchy, and the verification condition as a tolerable value, compares the possessive layout information of a child cell referred to from the cell in the hierarchy with the tolerable value, and determines whether or not the possessive layout information representing the child cell satisfies the verification condition.

9 . The data verification device according to claim 8 , wherein the verification unit calculates a difference between the cumulative value of the possessive layout information obtained until reaching the target value and the verification condition as an tolerable value, compares the possessive layout information for the cell of each hierarchy with the tolerable value, and determines whether or not the shaped item existing range information of the target cell satisfies the verification condition.

10 . The data verification device according to claim 7 , wherein the verification unit:

determines an operation mode in accordance with a signal based on operation of an input unit or information stored in the storage unit;

executes a detailed verification process when the operation mode is a first mode; and

executes a simple verification process when the operation mode is a second mode, in which the simple verification process includes reading out from the hierarchical expansion table the possessive layout information associated with a target cell, which is a child cell, comparing the read out possessive layout information with the verification condition, and determining whether or not the read out possessive layout information satisfies the verification condition.

11 . A computer readable medium encoded with program logic for having a data verification device verify data that verifies hierarchical structure layout data for a semiconductor device, the program logic comprising:

retrieving a verification condition that is set in accordance with a data processing system which processes the layout data generated by and provided from a designing device;

extracting shaped item existing range information and possessive layout information from the layout data to generate a hierarchical expansion table and store the table in a storage unit, in which the shaped item existing range information represents a range in which a shaped item exists in cells that are included in the layout data, the possessive layout information is for referring from a cell to a cell that is at least one order lower in hierarchy, and the hierarchical expansion table associates at least either one of the shaped item existing range information and the possessive layout information with each cell;

determining a target cell and a layout path to the target cell and storing information of the determined layout path in the storage unit;

reading out the possessive layout information associated with the cell of each hierarchy forming the determined layout path from the hierarchical expansion table, cumulating the possessive layout information associated with each cell from an uppermost layer cell of the layout path to the target cell, and calculating a cumulative value of the possessive layout information for the layout path;

determining whether or not the possessive layout information satisfies the verification condition based on the cumulative value, the verification condition, and the possessive layout information; and

determining whether or not the shaped item existing range information satisfies the verification condition based on the cumulative value of the possessive layout information for the layout path, the shaped item existing range information associated with the target cell, and the verification condition.

Assignments (2)
CHANGE OF NAME Recorded Jul 27, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024794/0500 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2009
From: KOMURA, YOSHIHISA; TOMIDA, JUNJI
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 022798/0551 →