IP Library Granted Patent US 7,864,888
Granted Patent B2
US 7,864,888 · App. 11/948,111 · Granted Jan 4, 2011

Transmission mode/guard length detection circuit and method therefor

Assignee: Fujitsu Semiconductor Limited
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,864,888
App. No.
11/948,111
Granted
Jan 4, 2011
Kind
B2
Abstract

A transmission mode/guard length detection circuit that uses the Orthogonal Frequency Division Multiplexing method, in which: a difference between a reference wave having a constant period generated on the basis of a transmission mode length that is a time period length of the predetermined symbol and a guard length that is a time period length of the guard interval and the peak value interval is calculated as a shift amount, and the shift amount is integrated for a symbol and is output, and the result of the integration for a predetermined symbol is changed on the basis of the shift amount.

Claims (24)

1. A transmission mode/guard length detection circuit for a radio device using the Orthogonal Frequency Division Multiplexing method, comprising:

a one-symbol delay circuit delaying a received principal wave including a guard interval equal to an end portion of a symbol, by real data of the symbol;

a guard correlation circuit calculating a correlation between the principal wave and an output of the one-symbol delay circuit;

a moving average circuit taking a moving average of the outputs of the guard correlation circuit for predetermined symbols;

a maximum value detection circuit detecting a peak value of the output of the moving average circuit for each of the symbols;

a maximum value integral circuit integrating the outputs of the maximum value detection circuit for predetermined symbols;

a guard maximum position shift amount integral circuit calculating a difference between a reference wave having a constant period and a peak value interval of the output of the maximum value detection circuit, said reference wave being generated on the basis of a transmission mode length that is a time period length of the predetermined symbol and a guard length that is a time period length of the guard interval, handling a resultant difference as a shift amount, integrating the shift amount for each of the symbols, and outputting a resultant value; and

a maximum value weighting circuit changing the output of the maximum value integral circuit on the basis of the shift amount.

2. The transmission mode/guard length detection circuit for a radio device according to claim 1 , wherein:

the maximum value weighting circuit includes a table having a weighting coefficient corresponding to the shift amount, multiplies the weighting coefficient by the output of the maximum value integral circuit, and outputs a resultant value.

3. The transmission mode/guard length detection circuit for a radio device according to claim 1 , further comprising at a stage subsequent to the maximum value weighting circuit:

a maximum value comparison circuit comparing the output of the maximum value weighting circuit with a predetermined threshold value, and determining a combination of the transmission mode length and the guard length on the basis of a comparison result.

4. A transmission mode/guard length detection method for a radio device using the Orthogonal Frequency Division Multiplexing method, comprising:

a one-symbol delay process in which a received principal wave including a guard interval equal to an end portion of a symbol is delayed by real data of the symbol;

a guard correlation process in which a correlation between the principal wave and an output of the one-symbol delay process is calculated;

a moving average process in which a moving average of the outputs of the guard correlation process for predetermined symbols is taken;

a maximum value detection process in which a peak value of the output of the moving average process for each of the symbols is detected;

a maximum value integral process in which the outputs of the maximum value detection process for predetermined symbols are integrated;

a guard maximum position shift amount integral process in which a difference between a reference wave having a constant period and a peak value interval of the output of the maximum value detection process is calculated, said reference wave being generated on the basis of a transmission mode length that is a time period length of the predetermined symbol and a guard length that is a time period length of the guard interval, handling a resultant difference as a shift amount, integrating the shift amount for each of the symbols, and outputting a resultant value; and

a maximum value weighting process of changing the output of the maximum value integral process on the basis of the shift amount.

5. The transmission mode/guard length detection method for a radio device according to claim 4 , wherein:

in the maximum value weighting process, a table having a weighting coefficient corresponding to the shift amount is used, the weighting coefficient is multiplied by the output of the maximum value integral process, and a resultant value is output.

6. The transmission mode/guard length detection method for a radio device according to claim 4 , further comprising at a stage subsequent to the maximum value weighting process:

a maximum value comparison process in which the output of the maximum value weighting process is compared with a predetermined threshold value, and a combination of the transmission mode length and the guard length is determined on the basis of a comparison result.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035508/0637 →
CHANGE OF NAME Recorded Jul 27, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024794/0500 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 10, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021985/0715 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 3, 2007
From: ADACHI, NAOTO
To: FUJITSU LIMITED
Reel/Frame 020220/0636 →
Priority Claims (1)
JP 2006-346493 · Dec 22, 2006 · national
Continuity (1)
Related Publication 20080152048A1 · Jun 26, 2008