IP Library Assignment 023311/0198
Patent Assignment
Reel/Frame 023311/0198

Assignment of Assignor's Interest

Recorded: 2009-09-28 Pages: 2
Assignor
TANAKA, MOTOYUKI
Executed: 2009-08-06
Assignee
FUJITSU LIMITED
1-1, KAMIKODANAKA 4-CHOME, NAKAHARA-KU, KAWASAKI-SHI, KANAGAWA 211-8588, JAPAN
Covered Property (1)
Semiconductor Device and Bias Generation Circuit
Patent: 8,222,951 →
Application: 12/567,964 →
Publication: US 2010/0013550