IP Library Assignment 023729/0318
Patent Assignment
Reel/Frame 023729/0318

Assignment of Assignor's Interest

Recorded: 2010-01-04 Pages: 2
Assignor
TSURUMOTO, TAKETOSHI
Executed: 2009-12-04
Assignee
NEC ELECTRONICS CORPORATION
1753 SHIMONUMABE, NAKAHARA-KU, KAWASAKI, KANAGAWA, 211-8668, JAPAN
Covered Property (1)
Layout Verification Device, Layout Verification Program, and Layout Verification Method of Layout Pattern of Semiconductor Device
Patent: 8,219,948 →
Application: 12/651,739 →
Publication: US 2010/0175034
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Change of Name Oct 26, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025193/0138 →