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Patent Assignment
Reel/Frame 024052/0960

Assignment of Assignor's Interest

Recorded: 2010-03-09 Pages: 3
Assignors
LEE, HYUNG-JIN
Executed: 2010-03-02
YOUNG, IAN A.
Executed: 2010-03-01
Assignee
INTEL CORPORATION
2200 MISSION COLLEGE BOULEVARD, SANTA CLARA, CALIFORNIA, 95052
Covered Property (1)
Digital Phase Locked Loop with Closed Loop Linearization Technique
Patent: 7,999,586 →
Application: 12/646,953 →
Publication: US 2011/0148488