Patent Assignment
Reel/Frame 024769/0827
Assignment of Assignor's Interest
Recorded: 2010-07-30
Pages: 4
Assignors
CHEN, YI-TZU
Executed: 2010-07-22
LO, BIN-HAU
Executed: 2010-07-22
LAI, TSAI-HSIN
Executed: 2010-07-22
CHEN, PEY-HUEY
Executed: 2010-07-22
SHIEH, HAU-TAI
Executed: 2010-07-22
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
NO. 8, LI-HSIN RD. 6, SCIENCE-BASED INDUSTRIAL PARK, HSIN-CHU, 300-77 R.O.C., TAIWAN
Covered Property
(1)
Split Bit Line Architecture Circuits and Methods for Memory Devices