Patent Assignment
Reel/Frame 024797/0724
Assignment of Assignor's Interest
Recorded: 2010-08-05
Pages: 6
Assignors
BALASUBRAMONIAN, RAJEEV
Executed: 2001-04-11
ALBONESI, DAVID
Executed: 2001-04-11
BUYUKTOSUNOGLU, ALPER
Executed: 2001-04-11
DWARKADAS, SANDHYA
Executed: 2001-04-11
Assignee
UNIVERSITY OF ROCHESTER
518 HYLAN BUILDING, ROCHESTER, NEW YORK, 14627
Covered Property
(1)
Memory Hierarchy Reconfiguration for Energy and Performance in General-Purpose Processor Architectures
Patent:
41,958 →
Application:
11/645,329 →