IP Library Assignment 025370/0001
Patent Assignment
Reel/Frame 025370/0001

Assignment of Assignor's Interest

Recorded: 2010-11-16 Pages: 4
Assignors
MAZURE, CARLOS
Executed: 2010-09-30
FERRANT, RICHARD
Executed: 2010-09-30
Assignee
S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES
PARC TECHNOLOGIQUE DES FONTAINES, F-38190 BERNIN, FRANCE
Covered Property (1)
METHOD OF CONTROLLING A DRAM MEMORY CELL ON THE SeOI HAVING A SECOND CONTROL GATE BURIED UNDER THE INSULATING LAYER
Application: 12/898,230 →
Publication: US 2011/0134690
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Change of Name Mar 4, 2012
From: S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES
To: SOITEC
Reel/Frame 027800/0911 →