IP Library Assignment 025387/0659
Patent Assignment
Reel/Frame 025387/0659

Security Agreement

Recorded: 2010-11-22 Pages: 19
Assignor
ICERA INC.
Executed: 2010-11-22
Assignee
SILICON VALLEY BANK
275 GROVE STREET, SUITE 2-200, NEWTON, MASSACHUSETTS, 02466
Covered Properties (56)
Apparatus and Method for Separate Asymmetric Control Processing and Data Path Processing in a Configurable Dual Path Processor That Supports Instructions Having Different Bit Widths
Patent: 8,484,441 →
Application: 10/813,433 →
Publication: US 2005/0223197
Apparatus and Method for Separate Asymmetric Control Processing and Data Path Processing in a Dual Path Processor
Patent: 9,047,094 →
Application: 10/813,615 →
Publication: US 2005/0223196
Method and Apparatus for Separate Control Processing and Data Path Processing in a Dual Path Processor with a Shared Load/Store Unit
Patent: 7,949,856 →
Application: 10/813,628 →
Publication: US 2005/0223193
Apparatus and Method for Turbo Decoder Termination
Patent: 7,454,684 →
Application: 10/825,212 →
Publication: US 2004/0260995
Detecting Excess Current Leakage of a Cmos Device
Patent: 7,564,274 →
Application: 11/065,904 →
Publication: US 2006/0186946
Aligned Logic Cell Grid and Interconnect Routing Architecture
Patent: 7,287,237 →
Application: 11/066,041 →
Publication: US 2006/0195810
Method for Optimising Transistor Performance in Integrated Circuits
Patent: 7,266,787 →
Application: 11/067,200 →
Publication: US 2006/0186478
Data Access and Permute Unit
Patent: 7,933,405 →
Application: 11/102,266 →
Publication: US 2006/0227966
Apparatus and method for configurable processing
Patent: 8,966,223 →
Application: 11/122,385 →
Publication: US 2006/0253689
Method and System for Computing Log-Likelihood Ratios for Coded Quadrature Amplitude Modulated Signals
Patent: 7,796,700 →
Application: 11/258,385 →
Publication: US 2006/0104378
Processing Data in a Digital Communications System
Patent: 8,009,777 →
Application: 11/812,116 →
Publication: US 2008/0310564
Clock Circuitry
Patent: 7,583,106 →
Application: 11/957,352 →
Publication: US 2009/0153194
Memory Interface
Patent: 7,577,048 →
Application: 11/967,540 →
Publication: US 2009/0172459
Radio Receiver in a Wireless Communications System
Patent: 9,385,895 →
Application: 12/016,629 →
Publication: US 2009/0110048
Radio Receiver in a Wireless Communications System
Patent: 8,189,653 →
Application: 12/016,640 →
Publication: US 2009/0110049
Processing Digital Samples in a Wireless Receiver
Patent: 9,479,215 →
Application: 12/016,652 →
Publication: US 2009/0110036
Synchronous Cdma Communication System
Patent: 8,126,451 →
Application: 12/016,663 →
Publication: US 2009/0111461
Alternative Signal Processing Functions in a Software Modem
Patent: 8,244,298 →
Application: 12/016,671 →
Publication: US 2009/0113429
Processing Signals in a Wireless Communications Environment
Patent: 8,682,272 →
Application: 12/016,681 →
Publication: US 2009/0111413
Wireless Receiver with Receive Diversity
Patent: 9,729,224 →
Application: 12/016,688 →
Publication: US 2009/0111542
Booting an Integrated Circuit
Patent: 8,024,557 →
Application: 12/127,131 →
Publication: US 2009/0172383
Clock Control
Patent: 8,321,718 →
Application: 12/275,375 →
Publication: US 2009/0138879
Memory Errors
Patent: 7,996,711 →
Application: 12/323,563 →
Publication: US 2009/0138754
Security Circuit for Power Up
Patent: 8,196,215 →
Application: 12/328,952 →
Publication: US 2009/0158445
Receiver Interface
Patent: 8,509,367 →
Application: 12/330,905 →
Publication: US 2009/0147888
Logical Signal Voltage Converter
Patent: 7,880,500 →
Application: 12/331,718 →
Publication: US 2009/0153190
Accessing Data
Patent: 8,275,921 →
Application: 12/425,471 →
Publication: US 2009/0271555
Clock Configuration
Patent: 8,341,451 →
Application: 12/428,728 →
Publication: US 2009/0273378
Debugging System and Method
Patent: 8,850,394 →
Application: 12/437,081 →
Publication: US 2009/0282294
Dma Engine
Patent: 7,996,581 →
Application: 12/466,038 →
Publication: US 2009/0287859
Instruction Cache
Patent: 8,689,197 →
Application: 12/572,836 →
Publication: US 2010/0088688
Boot Algorithm
Patent: 8,285,979 →
Application: 12/580,249 →
Publication: US 2010/0095106
Dma Engine
Patent: 8,527,671 →
Application: 12/643,674 →
Publication: US 2010/0185789
Processing Transmissions in a Wireless Communication System
Patent: 8,654,894 →
Application: 12/667,142 →
Publication: US 2010/0254445
Smart Card Module Supporting Authentication and Software-Defined Radio Function for a Wireless Device
Patent: 8,285,324 →
Application: 12/668,404 →
Publication: US 2010/0267418
Reporting Channel Quality Information
Patent: 8,150,435 →
Application: 12/673,568 →
Publication: US 2011/0105171
A Method and Transmitter for Transmitting a Signal in a Time Slot of a Channel Comprising a Plurality of Time Slots Employing a Reference Ramp Pattern
Patent: 8,254,405 →
Application: 12/703,319 →
Publication: US 2010/0202421
Resolving Mestastability
Patent: 7,880,506 →
Application: 12/713,412 →
Publication: US 2010/0225351
Reporting Channel Quality Information
Patent: 8,767,668 →
Application: 12/739,587 →
Publication: US 2010/0254469
Frequency Offset Estimation in a Cdma System
Patent: 8,737,292 →
Application: 12/741,796 →
Publication: US 2011/0007644
Processing Digital Samples in a Wireless Receiver
Patent: 9,191,059 →
Application: 12/794,211 →
Publication: US 2010/0296553
Physical Channel Establishment
Patent: 8,767,679 →
Application: 12/808,050 →
Publication: US 2010/0322191
Carrier Detection
Patent: 8,654,662 →
Application: 12/808,070 →
Publication: US 2010/0322094
Generating Channel Estimates in a Radio Receiver
Patent: 8,422,607 →
Application: 12/808,157 →
Publication: US 2010/0290547
Estimating Signal to Interference Ratio in a Wireless Communications Receiver
Patent: 8,885,780 →
Application: 12/808,161 →
Publication: US 2010/0284500
Power Control in a Wireless Communication System
Patent: 8,457,237 →
Application: 12/808,167 →
Publication: US 2011/0019754
Power Control in a Wireless Communication System
Patent: 8,447,342 →
Application: 12/808,169 →
Publication: US 2010/0304779
Power Control in a Wireless Communication System
Patent: 8,406,209 →
Application: 12/808,173 →
Publication: US 2010/0309850
An Apparatus and Method for Swithching Between Radio Access Tehcnologies in a Wireless Communication System
Application: 12/808,175 →
Publication: US 2010/0304769
Memory Cells
Patent: 8,193,044 →
Application: 12/810,786 →
Publication: US 2012/0001270
Method Using Differentially Encoded Feedback Information in Precoded Mimo-Ofdm Systems
Patent: 8,787,842 →
Application: 12/812,362 →
Publication: US 2011/0045783
Synchronous Cdma Communication System
Patent: 8,577,304 →
Application: 12/848,636 →
Publication: US 2011/0032837
Method and System for Processing a Signal
Patent: 9,083,446 →
Application: 12/889,035 →
Publication: US 2011/0075773
Processing Digital Samples in a Wireless Receiver
Patent: 8,576,957 →
Application: 12/933,377 →
Publication: US 2011/0019780
Equalisation Processing
Patent: 8,654,913 →
Application: 12/935,849 →
Publication: US 2011/0058597
Method and system for computing log-likelihood ratios for coded quadrature amplitude modulated signals
Application: 60/625,126 →
Related Assignments (20)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Aug 3, 2004
From: KNOWLES, SIMON
To: ICERA, INC.
Reel/Frame 015641/0461 →
Assignment of Assignor's Interest Aug 20, 2004
From: ALLPRESS, ALAN STEPHEN
To: ICERA, INC.
Reel/Frame 015702/0633 →
Assignment of Assignor's Interest Sep 15, 2004
From: KNOWLES, SIMON
To: ICERA, INC.
Reel/Frame 015787/0360 →
Assignment of Assignor's Interest Sep 15, 2004
From: KNOWLES, SIMON
To: ICERA, INC.
Reel/Frame 015787/0328 →
Assignment of Assignor's Interest May 17, 2005
From: MORTON, SHANNON VANCE
To: ICERA INC.
Reel/Frame 016248/0678 →
Assignment of Assignor's Interest May 17, 2005
From: HUGHES, PETER WILLIAM; MORTON, SHANNON VANCE; MONK, TREVOR KENNETH
To: ICERA INC.
Reel/Frame 016248/0680 →
Assignment of Assignor's Interest Jun 4, 2005
From: KNOWLES, SIMON
To: ICERA, INC.
Reel/Frame 016093/0995 →
Assignment of Assignor's Interest Jun 7, 2005
From: HUGHES, PETER WILLIAM
To: ICERA INC.
Reel/Frame 016308/0254 →
Assignment of Assignor's Interest Jul 13, 2005
From: KNOWLES, SIMON
To: ICERA, INC.
Reel/Frame 016258/0473 →
Assignment of Assignor's Interest Jan 25, 2006
From: ALLPRESS, STEVE; FELIX, STEVE; LUSCHI, CARLO
To: ICERA, INC.
Reel/Frame 017494/0175 →
Assignment of Assignor's Interest Mar 30, 2006
From: ALLPRESS, STEVE; FELIX, STEVE; LUSCHI, CARLO
To: ICERA, INC.
Reel/Frame 017412/0610 →
Assignment of Assignor's Interest Sep 11, 2007
From: ANDREWS, EDWARD; LUSCHI, CARLO; WALLINGTON, JONATHAN
To: ICERA, INC.
Reel/Frame 019812/0032 →
Assignment of Assignor's Interest Mar 20, 2008
From: FELIX, STEPHEN
To: ICERA INC.
Reel/Frame 020682/0282 →
Assignment of Assignor's Interest May 8, 2008
From: LUSCHI, CARLO; HUCKETT, SIMON; WALKER, SIMON; ALLPRESS, STEVE
To: ICERA, INC.
Reel/Frame 020916/0915 →
Assignment of Assignor's Interest May 9, 2008
From: LUSCHI, CARLOS; WALKER, SIMON; ALLPRESS, STEVE
To: ICERA INC.
Reel/Frame 020926/0248 →
Assignment of Assignor's Interest May 9, 2008
From: LUSCHI, CARLO; WALKER, SIMON; ALLPRESS, STEVE; JONES, PHILIP
To: ICERA INC.
Reel/Frame 020926/0165 →
Assignment of Assignor's Interest May 12, 2008
From: LUSCHI, CARLO; ALLPRESS, STEVE; JONES, PHILIP
To: ICERA, INC.
Reel/Frame 020934/0650 →
Assignment of Assignor's Interest May 14, 2008
From: CUMMING, PETE; MANGNALL, JON; CUNNINGHAM, GRAHAM
To: ICERA, INC.
Reel/Frame 020944/0709 →
Assignment of Assignor's Interest Jul 3, 2008
From: FELIX, STEPHEN
To: ICERA, INC.
Reel/Frame 021196/0353 →
Security Agreement Sep 10, 2008
From: ICERA, INC.
To: ETV CAPITAL SA
Reel/Frame 021510/0707 →