Patent Assignment
Reel/Frame 025421/0241
Assignment of Assignor's Interest
Recorded: 2010-11-24
Received: 2010-11-24
Pages: 6
Assignor
TOWER SEMICONDUCTOR LTD.
Executed: 2010-11-01
Assignee
RPX CORPORATION
ONE MARKET PLAZA, STEUART TOWER, SUITE 700, SAN FRANCISCO, CA, 94105, UNITED STATES
Covered Properties
(15)
Ultra Low Power Non-Volatile Memory Module
Application:
11/277,592 →
Low Voltage Sensing Circuit for Non-Volatile Memory Device
Application:
10/613,845 →
Multi-Bit Programmable Memory Cell Having Multiple Anti-Fuse Elements
Application:
10/430,931 →
Triple-Well Charge Pump Stage with No Threshold Voltage Back-Bias Effect
Application:
10/393,958 →
Complementary Non-Volatile Memory Cell
Application:
10/282,856 →
Voltage Control Circuit for High Voltage Supply
Application:
10/228,452 →
Self-Aligned Process for Fabricating Memory Cells with Two Isolated Floating Gates
Application:
10/154,395 →
Multi-Bit Programmable Memory Cell Having Multiple Anti-Fuse Elements
Application:
10/043,677 →
Efficient Test Structure for Non-Volatile Memory and Other Semiconductor Integrated Circuits
Application:
09/975,064 →
Voltage Regulator for Memory Device
Application:
09/941,451 →
Structure and Method for High Speed Sensing of Memory Arrays
Application:
09/935,013 →
Non-Volatile Memory Device with Self Test
Application:
09/931,848 →
Method and Apparatus for Reducing the Number of Programmed Bits in a Memory Array
Application:
09/898,725 →
Sense Amplifier Offset Cancellation in Non-Voltage Memory Circuits by Dedicated Programmed Reference Non-Volatile Memory Cells
Application:
09/888,348 →
High Voltage Charge Pump for Providing Output Voltage Close to Maximum High Voltage of a Cmos Device
Application:
09/888,353 →